이정근
홈 > 학부소개 > 교수소개 > 이정근
- 이정근 교수
- 직 위 : 교수
- 분 야 : 고성능 컴퓨팅, 인공지능 가속
- 연구실 : 공학관 A1201호
- 연락처 : 033-248-2312
- 이메일 : jeonggun.lee@hallym.ac.kr
학력
- 1996 ~ 2005 광주과학기술원 (공학박사 - VLSI/CAD)
- 1996 ~ 1998 광주과학기술원 (공학석사 - VLSI/CAD)
- 1992 ~ 1996 한림대학교 (이학사 – 전자계산학과)
주요경력
- 2005. 5. ~ 2007. 6. 캠브리지대학 컴퓨터연구소 박사후 연구원
- 2007. 8. ~ 2008. 2. 광주과학기술원 연구교수
- 2014. 2. ~ 2015. 2. 캠브리지대학 컴퓨터연구소 방문 교수
- 2008. 2. ~ 현재 한림대학교 교수
연구분야
- 고성능, 저전력, 고신뢰 디지털 회로 설계
- 고성능 GPU/FPGA 컴퓨팅, 인공지능 가속기 최적화 설계
대표 연구 업적
| 년도 | 업적 |
|---|---|
| 2015 | "Zero latency synchronization scheme using prediction and avoidance of synchronization failure in heterochronous clock domains," In Journal of Semiconductor Technology and Science, Volume 15, Number 2, April 2015 |
| 2015 | "Design Space Exploration of SW Beamformer on GPU," in Concurrency and Computation: Practice and Experience, Volume 27, Issue 7, pages 1718–1733, May 2015 |
| 2016 | "A Performance-Aware Yield Analysis and Optimization of Manycore Architectures," Computers & Electrical Engineering, Volume 54, August 2016 |
| 2017 | "A Performance, Power and Energy Analysis of Ultrasound B-Mode Imaging on a GPU with VFS," Concurrency and Computation: Practice and Experience. Volume 29, Issue 5, 10 March 2017 |
| 2017 | "Design of a Clockless MSP430 Core Using Mixed Asynchronous Design Flow," IEICE Electronics Express, March 31, 2017 |
| 2017 | "Exploring the Impacts of Optimization Strategies on Performance, Power/Energy Consumption of a GPU based Parallel Reduction," Journal of Central South University, Volume 24, Issue 11, pp 2624–2637, Nov. 2017 |
| 2018 | "Measurements of Metastability in MUTEX on an FPGA," IEICE Electronic Express, Vol.15, No.1, pp. 1–11, Jan. 2018 |
| 2018 | "Analysis of Clock Scheduling in Frequency Domain for Digital Switching Noise Suppressions," IEEE Transactions on Very Large Scale Integration (TVLSI), pp.1685-1698, Volume: 26, Issue:9, September 2018 |
| 2019 | "A Carry Chain Based ADMFC Design on an FPGA for EMI Reduction and Noise Compensation," in Journal of Circuits, Systems, and Computers, Vol. 28, Issue 1, Jan. 2019 |
| 2019 | "EM Emanation Exploration in FPGA-based Digital Design," Journal of Central South University, Volume 26, Issue 1, pp 158−167 Jan. 2019 |
| 2019 | "A High-Resolution and Glitch-Free All-Digital Variable Length Ring Oscillator Design on an FPGA," in Computers & Electrical Engineering, An International Journal, Volume 74, March 2019, Pages 149-163, 2019. (Impact Factor: 1.747, R2 in JCR) |